dc.contributor.author | Rajagopal, Karthikeyan | |
dc.contributor.author | Tuna, Murat | |
dc.contributor.author | Karthikeyan, Anitha | |
dc.contributor.author | Koyuncu, İsmail | |
dc.contributor.author | Duraisamy, Prakash | |
dc.contributor.author | Akgül, Akif | |
dc.date.accessioned | 2021-12-12T17:03:26Z | |
dc.date.available | 2021-12-12T17:03:26Z | |
dc.date.issued | 2019 | |
dc.identifier.issn | 1951-6355 | |
dc.identifier.issn | 1951-6401 | |
dc.identifier.uri | https://doi.org/10.1140/epjst/e2019-900005-8 | |
dc.identifier.uri | https://hdl.handle.net/20.500.11857/3678 | |
dc.description.abstract | Recent developments in the applications of neural networks in various engineering and technology applications have motivated researchers to study the nonlinear behavior of such networks. In this work we investigate a fractional-order Hopfield neural network with memristor synaptic weight. The dynamical properties of the proposed system are examined and the memristor neural network shows hyperchaotic attractors in fractional orders with hidden oscillations. We also propose an adaptive sliding mode control technique to synchronize the proposed fractional-order systems with uncertainties. Numerical simulations are derived to show the effectiveness of the synchronization algorithm. Moreover, the designed chaotic memristor Hopfield neural network system is realized on FPGA using the 4th-order Runge-Kutta (RK4) numerical algorithm. The FPGA-based chaotic memristor HNN is coded in VHDL using the 32-bit IEEE-754-1985 floating point standard. The chaotic memristor neural network designed on FPGA is synthesized and tested using Xilinx ISE. The chip statistics of Xilinx XC6VLX240T-1-FF1156 kit obtained from Place & Route operation for the designed RK4-based system is presented. The operating frequency of newly modeled FPGA-based memristor neural network chaotic signal generator is 231.616 MHz. | en_US |
dc.language.iso | eng | en_US |
dc.publisher | Springer Heidelberg | en_US |
dc.relation.ispartof | European Physical Journal-Special Topics | en_US |
dc.identifier.doi | 10.1140/epjst/e2019-900005-8 | |
dc.rights | info:eu-repo/semantics/closedAccess | en_US |
dc.subject | Chaotic Systems | en_US |
dc.subject | Nonlinear Dynamics | en_US |
dc.subject | Stability Analysis | en_US |
dc.subject | Circuit-Design | en_US |
dc.subject | Time | en_US |
dc.subject | Generator | en_US |
dc.subject | Equilibrium | en_US |
dc.subject | Oscillator | en_US |
dc.subject | Hardware | en_US |
dc.title | Dynamical analysis, sliding mode synchronization of a fractional-order memristor Hopfield neural network with parameter uncertainties and its non-fractional-order FPGA implementation | en_US |
dc.type | article | |
dc.authorid | Duraisamy, Prakash/0000-0001-6446-3766 | |
dc.authorid | Rajagopal, Karthikeyan/0000-0003-2993-7182 | |
dc.authorid | AKGUL, Akif/0000-0001-9151-3052 | |
dc.authorid | Karthikeyan, Anitha/0000-0001-6485-4687 | |
dc.department | Fakülteler, Mühendislik Fakültesi, Elektrik-Elektronik Mühendisliği Bölümü | |
dc.department | Meslek Yüksekokulları, Teknik Bilimler Meslek Yüksekokulu, Elektrik ve Enerji Bölümü | |
dc.identifier.volume | 228 | en_US |
dc.identifier.startpage | 2065 | en_US |
dc.identifier.issue | 10 | en_US |
dc.identifier.endpage | 2080 | en_US |
dc.relation.publicationcategory | Makale - Uluslararası Hakemli Dergi - Kurum Öğretim Elemanı | en_US |
dc.identifier.wos | WOS:000503216100013 | en_US |
dc.authorwosid | Duraisamy, Prakash/AAK-1600-2021 | |
dc.authorwosid | TUNA, Murat/AAY-4674-2020 | |
dc.authorwosid | Rajagopal, Karthikeyan/L-6724-2015 | |
dc.authorwosid | AKGUL, Akif/A-2225-2016 | |