Analysis, FPGA implementation of a Josephson junction circuit with topologically nontrivial barrier and its application to ring-based dual entropy core true random number generator
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info:eu-repo/semantics/closedAccessDate
2021Author
Ramakrishnan, BalamuraliOumate, Alhadji Abba
Tuna, Murat
Koyuncu, İsmail
Kingni, Sifeu Takougang
Rajagopal, Karthikeyan
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The analysis and field programmable gate arrays (FPGA) implementation of a resistive-capacitive-inductive shunted Josephson junction (RCLSJJ) circuit with topologically nontrivial barrier (TNB) are investigated in this paper. The stability analysis of the equilibrium points reveals the presence of a Pitchfork bifurcation. RCLSJJ circuit with TNB can change the spiking, bursting and relaxation oscillations to an excitable mode. The numerical simulations results also point out the existence of periodic attractors and different shapes of hidden chaotic attractors in RCLSJJ circuit with TNB. The FPGA of RCLSJJ circuit with TNB is implemented to ascertain the numerical simulations results. Finally, the dual entropy core (DEC) true random number generator (TRNG) application using Dormand-Prince based on RCLSJJ circuit with TNB and ring oscillators is implemented on FPGA. By synthesizing DEC TRNG for Xilinx XC7VX485T-2-FFG1761 FPGA chip, 1 Mbit number stream obtained from the design is analyzed using NIST-800-22 test suite and this bit stream acquired from the proposed structure is successfully passed all of the randomness tests.